1. Field of the Invention
The present invention relates to a semiconductor integrated circuit (IC) device, particularly to a dynamic random access memory (RAM) having a memory cell with one transistor and one capacitor.
2. Description of the Prior Art
In a dynamic RAM of the prior art as shown in FIG. 1, a gate electrode of a transfer gate transistor Tr' is electrically connected with a word line and a capacitor C' is formed between a drain of the transistor Tr' and a power source Vcc.
On the other hand, FIG. 2 shows a known memory cell wherein the capacitor C' is disposed between a bit line and a source of the transistor Tr' different from that of FIG. 1. Also the memory cell of FIG. 2 can function as a dynamic RAM.
FIG. 3 shows an example of a memory cell for a dynamic RAM according to the circuit of FIG. 2. In the memory cell, one of N.sup.+ -type diffusion areas 1 and 2, that is, a source region 2 of a transistor Tr' formed in a P-type epitaxial layer 6 is led out on a LOCOS (Local Oxidation of Silicon) oxide film 4 through a polysilicon wire or layer 3. At the led-out area of the source region, there is provided a capacitor C' having a thin oxide film 5 as a dielectric film and a polysilicon bit line B overlayed on the layer 3 as an electrode.
The memory cell of FIG. 3 is called "stacked cell" having the capacitor C' formed between the polysilicon layers 3 and B. However, there are several problems, for example, insulator breakdown of the capacitor may result due to the thin oxide film 5, and the process of manufacturing the cell is complicated.